1. Technical Field
This disclosure relates to a semiconductor memory device, and more particularly, to a non-volatile semiconductor memory device.
2. Description of the Related Art
Semiconductor memory devices can be largely categorized into a volatile memory devices, such as dynamic random access memory (DRAM) and static random access memory (SRAM), in which stored data may be lost and data can be quickly read and write; and non-volatile memory devices in which stored data can be retained but data is read and write slower than in the volatile memory devices. Nonvolatile memory devices can be categorized into read only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM) and electrically EPROM (EEPROM). EEPROM or flash EEPROM (hereinafter referred to as “flash memory”) data can be erased and a stack type gate structure in which a floating gate and a control gate are integrated.
A memory array of flash memory can have multiple strings as basic units. Each string has a structure in which a select transistor and multiple memory cells are connected in series. In a flash memory device with such a structure, the speed of programming a memory cell connected to a word line adjacent to a drain select line and a memory cell connected to a word line adjacent to a source select line can be degraded. To solve this problem, a structure in which a memory cell connected to a dummy word line is added to each string has been introduced.
An erasing operation of flash memory device can be largely categorized into pre-programming, main-erasing, and post-programming. Pre-programming is performed under the same bias conditions as in a normal programming operation in order to prevent memory cells from being excessively unnecessarily erased during subsequent erasing. All memory cells that are to be erased are pre-programmed. After pre-programming, main-erasing is performed so that all memory cells in a sector can have an “on” cell state. Once main-programming begins, all of the memory cells in the sector are erased at the same time. Lastly, post-programming is performed in order to recover memory cells that were excessively erased due to main-erasing. Post-programming is performed in a similar manner that pre-programming is performed, except for the bias conditions.
In the case of a conventional flash memory device with dummy word lines, post-programming is indiscriminately performed on dummy memory cells connected to the dummy word lines and normal memory cells connected to the normal word lines. That is, the normal memory cells and the dummy memory cells have the same threshold voltage as the result of performing post-programming. In this case, the dummy memory cells that are to be turned off may be turned on during programming after erasing, thus preventing the normal memory cells from being programmed.